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authorSubrata Banik <subratabanik@google.com>2023-06-22 01:00:06 +0530
committerSubrata Banik <subratabanik@google.com>2023-06-23 13:43:56 +0000
commit2172a6336a6e4bc5664fb1032c3dcf582c69899e (patch)
tree59b9598c6a7ce9d46892a8ae5d63cf86ed4bd360 /src/soc/intel/skylake/chip.c
parent051fedb8d3bba3f8a20300e358d21d3a49cf5e7b (diff)
soc/intel/common/block/cse: Retrieve CSE RW FW version conditionally
This patch introduces a newer config to store the CSE RW FW version into the CBMEM. Prior to that CSE RW FW version was fetched unconditionally and ended up increasing the boot time by 7ms to 20ms depending on the SoC arch (including CSE arch). The way to retrieve the CSE firmware version is by sending the HECI command to read the CSE Boot Partition (BP) info. The cost of sending HECI command to read the CSE FW version is between 7ms-20ms (depending on the SoC architecture) hence,ensure this feature is platform specific and only enabled for the platformthat would like to store the CSE version into the CBMEM. TEST=Build and boot google/rex to avoid getting CSE RW FW version to save 18ms of the boot time. w/o this patch:   10:start of ramstage                            722,215 (43)   17:starting LZ4 decompress (ignore for x86)     741,415 (19,200) w/ this patch:   10:start of ramstage                            722,257 (43)   17:starting LZ4 decompress (ignore for x86)     723,777 (1,520) Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I94f9f0f99706724c7d7e05668390f3deb603bd32 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75998 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Diffstat (limited to 'src/soc/intel/skylake/chip.c')
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