diff options
| author | Subrata Banik <subratabanik@google.com> | 2023-08-13 19:44:53 +0000 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-08-18 20:31:43 +0000 |
| commit | 5930263c10103bed3bebfa6cfefceb06fe98d744 (patch) | |
| tree | 175efa7f9c3b04f63933d6c5ab839c4fdea79fc7 /src/soc/intel/meteorlake | |
| parent | 88512b00ad2786795889a71b7835efe1cffba458 (diff) | |
soc/intel/meteorlake: Implement `soc_is_ish_partition_enabled` override
This patch implements `soc_is_ish_partition_enabled()` override to
uniquely identify the SKU type between ISH and non-ISH to conclude
if ISH partition is enabled and need to retrieve the ISH version from
CSE FPT by sending a HECI command.
BUG=b:285405031
TEST=Able to uniquely identify the ISH SKUs while booting
to google/rex_ec_ish to dump the ISH version.
Change-Id: I48358ad9e2e582e8b2274cbf4655de01f8792e6c
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77177
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/meteorlake')
| -rw-r--r-- | src/soc/intel/meteorlake/chip.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c index c2b1819f64..819278b199 100644 --- a/src/soc/intel/meteorlake/chip.c +++ b/src/soc/intel/meteorlake/chip.c @@ -122,6 +122,20 @@ const char *soc_acpi_name(const struct device *dev) } #endif +#if CONFIG(SOC_INTEL_STORE_ISH_FW_VERSION) +/* SoC override API to identify if ISH Firmware existed inside CSE FPT */ +bool soc_is_ish_partition_enabled(void) +{ + struct device *ish = pcidev_path_on_root(PCI_DEVFN_ISH); + uint16_t ish_pci_id = ish ? pci_read_config16(ish, PCI_DEVICE_ID) : 0xFFFF; + + if (ish_pci_id == 0xFFFF) + return false; + + return true; +} +#endif + /* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */ static void soc_fill_gpio_pm_configuration(void) { |