diff options
| author | Subrata Banik <subratabanik@google.com> | 2023-01-20 21:38:05 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-01-24 05:44:03 +0000 |
| commit | 289f9a5566367e28c73c31d4d0f637caaa21e7f1 (patch) | |
| tree | 975a8bddc922ca0da2b3496fe80e26bdee7e706f /src/soc/intel/meteorlake | |
| parent | 7d68353d154d17b1f70f7724f537305c782aa54a (diff) | |
soc/intel/meteorlake: Convert chip config into snake case
This patch converts below chip configs from camel case to snake
case to match with the other chip configs belongs to the chip
structure.
- SaGv
- RMT
Additionally, updated the `sagv` help text and operation as
applicable based on the FSPMUPD.h file (belongs to the vendorcode).
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I62e521cf3f46e888e2c995d83ac7dc666de1af82
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72135
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Diffstat (limited to 'src/soc/intel/meteorlake')
| -rw-r--r-- | src/soc/intel/meteorlake/chip.h | 16 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/romstage/fsp_params.c | 4 |
2 files changed, 8 insertions, 12 deletions
diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h index 97b3c5b363..4e95321fcc 100644 --- a/src/soc/intel/meteorlake/chip.h +++ b/src/soc/intel/meteorlake/chip.h @@ -122,19 +122,15 @@ struct soc_intel_meteorlake_config { /* System Agent dynamic frequency support. Only effects ULX/ULT CPUs. * When enabled memory will be training at two different frequencies. - * 0:Disabled, 1:FixedPoint0, 2:FixedPoint1, 3:FixedPoint2, - * 4:FixedPoint3, 5:Enabled */ + * 0:Disabled, 1:Enabled + */ enum { - SaGv_Disabled, - SaGv_FixedPoint0, - SaGv_FixedPoint1, - SaGv_FixedPoint2, - SaGv_FixedPoint3, - SaGv_Enabled, - } SaGv; + SAGV_DISABLED, + SAGV_ENABLED, + } sagv; /* Rank Margin Tool. 1:Enable, 0:Disable */ - uint8_t RMT; + uint8_t rmt; /* USB related */ struct usb2_port_config usb2_ports[CONFIG_SOC_INTEL_USB2_DEV_MAX]; diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c index 1c4f02e664..c01896faff 100644 --- a/src/soc/intel/meteorlake/romstage/fsp_params.c +++ b/src/soc/intel/meteorlake/romstage/fsp_params.c @@ -122,8 +122,8 @@ static void fill_fspm_igd_params(FSP_M_CONFIG *m_cfg, static void fill_fspm_mrc_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_meteorlake_config *config) { - m_cfg->SaGv = config->SaGv; - m_cfg->RMT = config->RMT; + m_cfg->SaGv = config->sagv; + m_cfg->RMT = config->rmt; } static void fill_fspm_cpu_params(FSP_M_CONFIG *m_cfg, |