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authorSubrata Banik <subratabanik@google.com>2023-09-20 19:28:41 +0000
committerSubrata Banik <subratabanik@google.com>2023-10-04 18:50:32 +0000
commit913ea97fbe0907a86e221a9553b21fcc7aecff57 (patch)
treea3c64ce6710af1d96584a129dca5fa20a0fac285 /src/soc/intel/meteorlake/elog.c
parent1858903e780391cac0f37157f5de821b508d4e8d (diff)
soc/intel: Select GMA v2 for ADL, MTL, TGL to reflect port/pipe defs
Intel GFX IP TRANS_DDI_FUNC_CTL register bit definitions have changed since Tiger Lake. This register is used to map ports and pipes to display controllers, so reflecting the correct status is important for detecting physical display end point devices. This patch ensures that ADL, MTL, and TGL SoCs choose GMA version 2 to properly reflect the updated port and pipe register definitions. BUG=b:299137940 TEST=Build and boot google/rex successfully. Change-Id: Ie2082747d18a5f136f410b1019be4d6c801617b1 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78079 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src/soc/intel/meteorlake/elog.c')
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