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authorRavi Sarawadi <ravishankar.sarawadi@intel.com>2022-05-08 00:46:38 -0700
committerSubrata Banik <subratabanik@google.com>2022-07-01 07:21:29 +0000
commit5a9dd75d7b54412e2218dad0a1a9e8c116ede9f2 (patch)
tree3b2f203e53ec874b2176ce6b36db152213b80bd0 /src/soc/intel/meteorlake/bootblock
parentf36b0138c4c38bcffcb2cf6fae82fbfbeabf035b (diff)
soc/intel/mtl: Add GPIOs for Meteor Lake SOC
Add definitions for the GPIO pins on Meteor Lake SoC, as well as GPIO IRQ routing information and supporting ACPI ASL. For now, add the following GPIO communities and GPIO groups: Comm. 0: GPP_CPU, GPP_V, GPP_C Comm. 1: GPP_A, GPP_E Comm. 3: GPP_H, GPP_F, SPI0, VGPIO3 Comm. 4: GPP_S, JTAG Comm. 5: GPP_B, GPP_D, VGPIO BUG=b:224325352 TEST=util/abuild/abuild -p none -t google/rex -a -c max Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com> Change-Id: I7fe9654f22b074a9af18eb7bcdc21812dee77035 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64169 Reviewed-by: Tarun Tuli <taruntuli@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/meteorlake/bootblock')
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