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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2020-10-19 17:40:02 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-26 06:46:39 +0000 |
| commit | 2c70708a78d137f322bc32556b5b3a13962dfa46 (patch) | |
| tree | 9789ad6d317583ed16a3dd68a8738e80a69051fa /src/soc/intel/jasperlake/i2c.c | |
| parent | 5ec02680eb816160bc9f4af2c6385ed3d9e90fbf (diff) | |
soc/intel/common/block/smbus: Add Cannonpoint PCH-H PCI ID
This is required to make sure the defined SMBUS_BASE address is valid
even after PCI enumeration.
Tested on Prodrive Hermes.
Change-Id: Ibd40e556fd890000836d23682d4e9e3aa5200c54
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46562
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/jasperlake/i2c.c')
0 files changed, 0 insertions, 0 deletions