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| author | Michael Niewöhner <foss@mniewoehner.de> | 2021-01-01 21:14:16 +0100 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2021-01-11 20:49:30 +0000 |
| commit | 320a3ab7d235adeeb0dd73e99995334cbe99ea9f (patch) | |
| tree | 600a4f0f0e0b6c698a25f7d7c4e04c3b17cd9ff2 /src/soc/intel/icelake/include | |
| parent | f0a44ae0eb329ba4c6f77f1635675ea042492be1 (diff) | |
soc/intel/cnl: add SLP_S0 residency register and enable LPIT support
Test: Linux adds the cpuidle sysfs interface; Windows with s0ix_enable=1
boots without crashing with an INTERNAL_POWER_ERROR.
- Windows and Linux tested on google/akemi
- Linux tested on clevo/cml-u
Change-Id: I51fdf52419aa7f059b70a906fd8bdac88d5b6046
Tested-By: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: Michael Niewöhner <foss@mniewoehner.de>
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49046
Reviewed-by: Lance Zhao
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/icelake/include')
0 files changed, 0 insertions, 0 deletions