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authorLu, Pen-ChunX <pen-chunx.lu@intel.com>2024-10-25 02:23:53 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-11-08 07:22:16 +0000
commitbc1e422665d44c01d9beb8bceef5b614c61d621e (patch)
tree77c846c67a65e780a13449329614004ff51a2243 /src/soc/intel/common
parent9c7ce22de917deaf2911803caa71d510814ec3c3 (diff)
soc/intel/xeon_sp: Create SSDT for Gen6 LPC controller
In coreboot, LPC ACPI objects with its attached devices are usually provided by static DSDT. For Xeon-SP Gen6 LPC, its logical attached devices are created from dynamic SSDT (e.g. super IO). Create a simple SSDT for LPC in dynamic way as well to complete the device relationship chain. Fix below issues during Linux OS boot. The issue will block Windows OS boot as well. [ 22.986142] ACPI BIOS Error (bug): Could not resolve symbol [\_SB.DI00.LPCB], AE_NOT_FOUND (20230628/dswload2-162) [ 22.986792] ACPI Error: AE_NOT_FOUND, During name lookup/catalog (20230628/psobject-220) [ 22.987786] ACPI: Skipping parse of AML opcode: Scope (0x0010) Change-Id: I08543fc77f0f3e633b05889e921c5183e6e20d8e Signed-off-by: Lu, Pen-ChunX <pen-chunx.lu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84842 Reviewed-by: Martin L Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common')
-rw-r--r--src/soc/intel/common/block/include/intelblocks/lpc_lib.h3
-rw-r--r--src/soc/intel/common/block/lpc/lpc.c10
2 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h
index 0c4780b89c..bb28fc35cf 100644
--- a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h
+++ b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h
@@ -53,6 +53,9 @@ void lpc_open_mmio_window(uintptr_t base, size_t size);
/* Init SoC Specific LPC features. Common definition will be weak and
each soc will need to define the init. */
void lpc_soc_init(struct device *dev);
+/* Create SoC specific SSDT, by default it does nothing so that static
+DSDT could be used. */
+void lpc_soc_fill_ssdt(const struct device *dev);
/* Fill up LPC IO resource structure inside SoC directory */
void pch_lpc_soc_fill_io_resources(struct device *dev);
/* Set LPC BIOS Control BILD bit. */
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index b05ee590d4..db06db9a06 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -16,6 +16,15 @@ __weak void lpc_soc_init(struct device *dev)
/* no-op */
}
+/* Create SoC specific SSDT */
+__weak void lpc_soc_fill_ssdt(const struct device *dev)
+{
+ /*
+ * no-op
+ * by default it does nothing so that static DSDT could be used
+ */
+}
+
/* Fill up LPC IO resource structure inside SoC directory */
__weak void pch_lpc_soc_fill_io_resources(struct device *dev)
{
@@ -134,6 +143,7 @@ struct device_operations lpc_ops = {
#if CONFIG(HAVE_ACPI_TABLES)
.write_acpi_tables = southbridge_write_acpi_tables,
.acpi_name = lpc_acpi_name,
+ .acpi_fill_ssdt = lpc_soc_fill_ssdt,
#endif
.init = lpc_soc_init,
.scan_bus = scan_static_bus,