diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2024-06-26 11:29:24 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-06-28 12:26:07 +0000 |
| commit | 4bdb089147b7cfa3ab52de7449e7fba82672a080 (patch) | |
| tree | f3c074daeb982201515a67a413bf30187a6c94e8 /src/soc/intel/common | |
| parent | 2eb9d5ed62d3c3a4484c686af12d29a390ccf963 (diff) | |
device/azalia_device.c: Always read-write GCAP
In the HD Audio Specification Rev. 1.0a, every bitfield in the GCAP
register is RO (Read Only). However, it is known that in some Intel
PCHs (e.g 6-series and 7-series, documents 324645 and 326776), some
of the bitfields in the GCAP register are R/WO (Read / Write Once).
GCAP is RO on 5-series PCHs; 8-series and 9-series PCHs have a lock
bit for GCAP elsewhere.
Lock GCAP by reading GCAP and writing back the same value. This has
no effect on platforms that implement GCAP as a RO register or lock
GCAP through a different mechanism.
Change-Id: Id61e6976a455273e8c681dbeb4bad35d57b1a8a2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83218
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/hda/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/hda/Kconfig b/src/soc/intel/common/block/hda/Kconfig index 64f34ef2ab..a91764a1ef 100644 --- a/src/soc/intel/common/block/hda/Kconfig +++ b/src/soc/intel/common/block/hda/Kconfig @@ -8,6 +8,5 @@ config SOC_INTEL_COMMON_BLOCK_HDA config SOC_INTEL_COMMON_BLOCK_HDA_VERB bool depends on SOC_INTEL_COMMON_BLOCK_HDA - select AZALIA_LOCK_DOWN_R_WO_GCAP help Enable initialization of HDA codecs. |