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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-14 05:41:41 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-15 06:55:59 +0000
commitfaf20d30a6e451d45e29613e3f4603dc72771843 (patch)
treed1c3df6e87473d66633fb3a4a8cec736fdda2cd7 /src/soc/intel/common/block
parentf091f4daf7e76cff3cdf9b7a19bb77281fb6af9d (diff)
soc/intel: Rename some SMM support functions
Rename southbridge_smm_X to smm_southbridge_X. Rename most southcluster_smm_X to smm_southbridge_X. Change-Id: I4f6f9207ba32cf51d75b9ca9230e38310a33a311 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34856 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r--src/soc/intel/common/block/include/intelblocks/smm.h35
-rw-r--r--src/soc/intel/common/block/smm/smm.c2
2 files changed, 1 insertions, 36 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/smm.h b/src/soc/intel/common/block/include/intelblocks/smm.h
index 25ff8f4ec9..8b13789179 100644
--- a/src/soc/intel/common/block/include/intelblocks/smm.h
+++ b/src/soc/intel/common/block/include/intelblocks/smm.h
@@ -1,36 +1 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2017 Intel Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#ifndef SOC_INTEL_COMMON_BLOCK_SMM_H
-#define SOC_INTEL_COMMON_BLOCK_SMM_H
-
-#include <stdint.h>
-
-/*
- * This common code block relies on each specific SOC defining the macro
- * ENABLE_SMI_PARAMS for the values needed for SMI enabling on the
- * specific SOC
- */
-
-/*
- * The initialization of the southbridge is split into 2 compoments. One is
- * for clearing the state in the SMM registers. The other is for enabling
- * SMIs.
- */
-void smm_southbridge_clear_state(void);
-void smm_southbridge_enable(uint16_t pm1_events);
-
-#endif
diff --git a/src/soc/intel/common/block/smm/smm.c b/src/soc/intel/common/block/smm/smm.c
index 12c057b25a..bef923ac1a 100644
--- a/src/soc/intel/common/block/smm/smm.c
+++ b/src/soc/intel/common/block/smm/smm.c
@@ -18,8 +18,8 @@
#include <bootstate.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
+#include <cpu/intel/smm_reloc.h>
#include <intelblocks/pmclib.h>
-#include <intelblocks/smm.h>
#include <intelblocks/systemagent.h>
#include <soc/pm.h>