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authorSubrata Banik <subratabanik@google.com>2022-01-03 17:33:35 +0000
committerPaul Fagerburg <pfagerburg@chromium.org>2022-01-10 17:27:01 +0000
commit76806c3263111afb3b451f024ef45adfbee7949e (patch)
tree93bded30887e5ac8400f6933d35611e982fb1ef7 /src/soc/intel/common/block
parent7f1a63f074e175aa7839c64a888fca9d7bd45ad7 (diff)
soc/intel/common/cse: Add config to disable HECI1 at pre-boot
This patch adds a config to let mainboard users choose the correct state of HECI1(CSE) device prior to handing off to payload. `DISABLE_HECI1_AT_PRE_BOOT` config to make HECI1 function disable at pre-boot. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I7e127816c506df3ac0cf973b69021d02d05bef4a Reviewed-on: https://review.coreboot.org/c/coreboot/+/60721 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/common/block')
-rw-r--r--src/soc/intel/common/block/cse/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig
index ec901ca8a1..23e08e636a 100644
--- a/src/soc/intel/common/block/cse/Kconfig
+++ b/src/soc/intel/common/block/cse/Kconfig
@@ -5,6 +5,15 @@ config SOC_INTEL_COMMON_BLOCK_CSE
Driver for communication with Converged Security Engine (CSE)
over Host Embedded Controller Interface (HECI)
+config DISABLE_HECI1_AT_PRE_BOOT
+ bool "Disable HECI1 at the end of boot"
+ depends on SOC_INTEL_COMMON_BLOCK_CSE
+ default n
+ help
+ This config decides the state of HECI1(CSE) device at the end of boot.
+ Mainboard users to select this config to make HECI1 `function disable`
+ prior to handing off to payload.
+
config SOC_INTEL_COMMON_BLOCK_HECI_DISABLE_IN_SMM
bool
default y if HECI_DISABLE_USING_SMM