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author | Subrata Banik <subratabanik@google.com> | 2022-12-08 15:31:30 +0530 |
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committer | Subrata Banik <subratabanik@google.com> | 2022-12-10 08:02:26 +0000 |
commit | 49204e30f390737724ee8fc3f57dfb4dc4a5bcbc (patch) | |
tree | c05e6934a41e7c3eed412c81445c8358b469bf11 /src/soc/intel/common/block/include/intelblocks | |
parent | 650de582207c63c3592bdb3867557e5c968974ba (diff) |
soc/intel/tigerlake: Move TCSS FW latency macros to tcss.h
This patch moves TCSS firmware latency related macros from
`tcss_pcierp.asl` to SoC specific `tcss.h`.
TEST=Able to build and boot Google/Volteer.
Change-Id: I96416f3b68d853c9a5a44c499719f154aa15f0ca
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70486
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks')
0 files changed, 0 insertions, 0 deletions