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authorVarshit Pandya <pandyavarshit@gmail.com>2023-10-16 22:56:52 +0530
committerFelix Held <felix-coreboot@felixheld.de>2023-10-31 14:40:22 +0000
commit5397b4dcf228b097f769fcaf3d88cc36316423c1 (patch)
tree76474734208246a26f50e689c3053edef5c6c20d /src/soc/intel/cannonlake/acpi.c
parentd581878264fc9c5900c19d1a8b3b1851d1b695db (diff)
soc/amd/genoa: Add PCI interrupt support
This patch adds PCI interrupt details as per the Processor Programming Reference (PPR) version 0.25 (#55901), table 319. Change-Id: I81251bd60aac1d7bd3181699d3adca315291f336 Signed-off-by: Varshit Pandya <pandyavarshit@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78392 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/acpi.c')
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