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authorAngel Pons <th3fanbus@gmail.com>2020-11-23 13:00:51 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-01-24 12:02:15 +0000
commita3288b38e10dc78d31670449904268cc72a5cb47 (patch)
treecab658132b182a7460ab3df255bfac371d9a0f51 /src/soc/intel/broadwell
parent417a6da4494dbff7e13e9a4795408d3599ef91e3 (diff)
soc/intel/broadwell: Allow to use Haswell CPU code instead
This allows individual boards to be adapted to use Haswell CPU code. Also rename the CPU_SPECIFIC_OPTIONS symbol to avoid any collisions. Change-Id: I65e878dacf0a0d53fd8d4defce6684f4ceb92588 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46944 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell')
-rw-r--r--src/soc/intel/broadwell/Kconfig2
-rw-r--r--src/soc/intel/broadwell/Makefile.inc5
2 files changed, 6 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index 537d4fa9e6..7f27026d57 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -9,7 +9,7 @@ config INTEL_LYNXPOINT_LP
bool
default y if SOC_INTEL_BROADWELL
-config CPU_SPECIFIC_OPTIONS
+config SOC_SPECIFIC_OPTIONS
def_bool y
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select ARCH_ALL_STAGES_X86_32
diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc
index 7d21665138..01f351d681 100644
--- a/src/soc/intel/broadwell/Makefile.inc
+++ b/src/soc/intel/broadwell/Makefile.inc
@@ -1,6 +1,11 @@
ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
+ifeq ($(CONFIG_CPU_INTEL_HASWELL),y)
+romstage-y += cpu/romstage.c
+else
subdirs-y += cpu
+endif
+
subdirs-y += pch
bootblock-y += bootblock.c