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authorMichael Niewöhner <foss@mniewoehner.de>2021-01-01 21:23:52 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2021-01-11 20:49:43 +0000
commit11fae4ffe019ad648e517115aa1ec7bedbf4f648 (patch)
tree51bcf137ad7f6cbd2fe798d8b464f83bda520221 /src/soc/intel/broadwell/pch/pcie.c
parent320a3ab7d235adeeb0dd73e99995334cbe99ea9f (diff)
soc/intel/skl: add SLP_S0 residency register and enable LPIT support
Test: Linux adds the cpuidle sysfs interface; Windows with s0ix_enable=1 boots without crashing with an INTERNAL_POWER_ERROR. Change-Id: Icccd9d15a9e9a22c9bfe7a9843e95d77013c9c8f Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49047 Reviewed-by: Lance Zhao Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/pch/pcie.c')
0 files changed, 0 insertions, 0 deletions