summaryrefslogtreecommitdiff
path: root/src/soc/intel/broadwell/me_status.c
diff options
context:
space:
mode:
authorMartin Roth <martinroth@chromium.org>2018-03-01 11:26:18 -0700
committerPatrick Georgi <pgeorgi@google.com>2018-03-06 08:45:32 +0000
commit069ca66ea402b51e2043a5587f29819e9331e8bf (patch)
tree9ea6c89f991ce5f257917af2e2f5a548b106f8e3 /src/soc/intel/broadwell/me_status.c
parent345d1e39629b3548e40a82ed6d3d49bdcd5b6b88 (diff)
soc/amd/stoneyridge: Add ST/CZ SMBus device id
The SMBus PCI device ID for Stoney wasn't updated when the code was pulled over from hudson. This means that the IOAPIC wasn't being initialized in coreboot. BUG=b:74070580 TEST=Boot Grunt, see IOAPIC init messages in console. Change-Id: Ida5d3f3592488694681300d79444c1e26fff6a1a Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/24930 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/me_status.c')
0 files changed, 0 insertions, 0 deletions