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author | Nico Huber <nico.h@gmx.de> | 2024-01-12 16:22:19 +0100 |
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committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-01-17 22:07:04 +0000 |
commit | 8b4677fbbf2dd9d748ecba023c4a07afcaa2d7d0 (patch) | |
tree | 723ac8d382a56e5f689cfe0f5f1e3405df83d750 /src/soc/intel/braswell | |
parent | 059476d18c8e8e09fa5a42b1db24b965fa08f71a (diff) |
soc/intel/elkhartlake: Drop redundant PcieRpEnable
The PcieRpEnable option is redundant to our on/off setting in the
devicetrees. Let's use the common coreboot infracture instead.
Thanks to Nicholas for doing all the mainboard legwork!
Change-Id: I11c3c45eae0e1451d5c54c17b7e60300dedda8fa
Signed-off-by: Nico Huber <nico.h@gmx.de>
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jan Samek <jan.samek@siemens.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src/soc/intel/braswell')
0 files changed, 0 insertions, 0 deletions