diff options
| author | Tan, Lean Sheng <lean.sheng.tan@intel.com> | 2020-12-10 08:58:19 -0800 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2020-12-14 05:46:13 +0000 |
| commit | d14918f6d0a7ead49a724f73fc97a5fbc52529e9 (patch) | |
| tree | 920c62d61f5450ba6da947d61318095cd93bb736 /src/soc/intel/braswell/gpio.c | |
| parent | 3cf8a03730e2ee7d080497f244d500da57580611 (diff) | |
soc/intel/elkhartlake: Update HECI Control Status Register settings
For EHL, SpiProtectionMode is added to HFSTS register #1.
The original Manufacturing Mode is detected via FpfSocConfigLock
instead. If FpfSocConfigLock=1, means it is in Menufacturing Mode,
and it is in EOM (End Of Manufacturing) when FpfSocConfigLock=0.
Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: I9d1d004a6b5b276e33be80f02cd1197b88d379ae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48539
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell/gpio.c')
0 files changed, 0 insertions, 0 deletions