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authorSubrata Banik <subratabanik@google.com>2022-02-17 20:40:55 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-02-21 15:22:01 +0000
commitfac11d000ab73c306bba6798aff55bc73afa11dd (patch)
tree8aee4a18d14f144938cd36f46e269df89391bfc6 /src/soc/intel/baytrail/placeholders.c
parentbf81c24e078c3eaea6cc2cd53e681579543c03a2 (diff)
soc/intel/denverton_ns: Select PMC PCI discoverable config
This patch selects SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE config to reflect the SoC actual behaviour where PMC PCI device is still visible over bus even after FSP-S exit. Additionally, add DNV PMC PCI ID into PMC IA-common code. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Iaaea20e54c909800e4d75b58c29507fc1944cfba Reviewed-on: https://review.coreboot.org/c/coreboot/+/62135 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Mariusz Szafrański <mariuszx.szafranski@intel.com>
Diffstat (limited to 'src/soc/intel/baytrail/placeholders.c')
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