summaryrefslogtreecommitdiff
path: root/src/soc/intel/alderlake/meminit.c
diff options
context:
space:
mode:
authorSubrata Banik <subrata.banik@intel.com>2021-11-19 13:49:21 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-11-20 17:49:00 +0000
commit2ee30add352c56fbf5a49ed27705318adaff7893 (patch)
treea4165c2b3e43ed371e58df8b9809c5cb141b07de /src/soc/intel/alderlake/meminit.c
parentd7375b3fdd1b39ed029aa2a4c013e46811291469 (diff)
soc/intel/common/thermal: Allow thermal configuration over PMC
Thermal configuration has evolved over PCH generations where latest PCH has provided an option to allow thermal configuration using PMC PWRMBASE registers. This patch adds an option for impacted SoC to select the Kconfig for allowing thermal configuration using PMC PCH MMIO space. BUG=b:193774296 TEST=Able to build and boot hatch and adlrvp platform. Change-Id: I0c6ae72610da39fc18ff252c440d006e83c570a0 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59209 Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/meminit.c')
0 files changed, 0 insertions, 0 deletions