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author | Angel Pons <th3fanbus@gmail.com> | 2020-10-29 13:19:48 +0100 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2021-01-24 12:01:31 +0000 |
commit | 417a6da4494dbff7e13e9a4795408d3599ef91e3 (patch) | |
tree | d94c3549d83bc1b42d8110d6bb9456dee9ba7d74 /src/soc/intel/alderlake/gspi.c | |
parent | f542b7bcef183ab26b194fa14a6a660eac4ae880 (diff) |
soc/intel/broadwell: Select INTEL_LYNXPOINT_LP
This allows the correct Haswell and Lynxpoint code to be used.
Change-Id: Icbfc5bb11b1ea755a143fa340a3971376f4e5e91
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46958
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/gspi.c')
0 files changed, 0 insertions, 0 deletions