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authorMeera Ravindranath <meera.ravindranath@intel.com>2021-06-18 11:02:45 +0530
committerPatrick Georgi <pgeorgi@google.com>2021-06-21 05:38:58 +0000
commit8b60afe1b0973601fb423b43a4906d89e16869eb (patch)
tree3a7459d0680be357f2b4aaa1c34b1636e1559761 /src/soc/intel/alderlake/bootblock
parente76aac697750b046fe35d81ccd3810e1c2630168 (diff)
soc/intel/alderlake: Add GFx Device ID 0x46b3
List of changes: 1. Add new GFx ID 0x46B3 into device/pci_ids.h 2. Update new GFx ID into common graphics.c 3. Add new GFx ID description into report_platform.c TEST=Build and boot brya Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com> Change-Id: I4343c7343875eb40c2955f6f4dd98d6446852dc0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55662 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Diffstat (limited to 'src/soc/intel/alderlake/bootblock')
-rw-r--r--src/soc/intel/alderlake/bootblock/report_platform.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index a9a761e73e..5ddc3228a0 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -104,6 +104,7 @@ static struct {
{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_2, "Alderlake P GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, "Alderlake P GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, "Alderlake P GT2" },
+ { PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
};