diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-07-01 08:24:18 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-09-10 21:53:32 +0000 |
| commit | 5faee2ed0f9d6e2a6a3ccca880eb57d616bea799 (patch) | |
| tree | 0edadfcc2a9f19ced43c47fdf187eab61f5b518f /src/soc/intel/alderlake/acpi | |
| parent | 2eb100dd123e6f73e41f5c3c270c9e2f4c334ba7 (diff) | |
soc/intel/alderlake: Switch to runtime generation of Intel Power Engine
The pep.asl file is being obsoleted by runtime generation, therefore
switch alderlake boards to this method.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I617bc3d1c3cf4ac6b6cbbd790dcf62e731024834
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56006
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/alderlake/acpi')
| -rw-r--r-- | src/soc/intel/alderlake/acpi/southbridge.asl | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/alderlake/acpi/southbridge.asl b/src/soc/intel/alderlake/acpi/southbridge.asl index 59bcf7461f..8300c23b7f 100644 --- a/src/soc/intel/alderlake/acpi/southbridge.asl +++ b/src/soc/intel/alderlake/acpi/southbridge.asl @@ -38,8 +38,5 @@ /* PCI _OSC */ #include <soc/intel/common/acpi/pci_osc.asl> -/* Intel Power Engine Plug-in */ -#include <soc/intel/common/block/acpi/acpi/pep.asl> - /* GbE 0:1f.6 */ #include <soc/intel/common/block/acpi/acpi/pch_glan.asl> |