diff options
author | MAULIK V VAGHELA <maulik.v.vaghela@intel.com> | 2022-03-16 17:35:22 +0530 |
---|---|---|
committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-03-17 19:45:11 +0000 |
commit | 5008d340033d9289dade91569e356f9317f9b3a9 (patch) | |
tree | f16c09879c804973321f8ab09ca9c2e17fe891a4 /src/soc/intel/alderlake/acpi | |
parent | 9bd35ddb35d041d56bcee3bd3a804053b10e0c58 (diff) |
soc/intel/adl: Remove IOM Mctp command from TCSS ASL
TCSS ASL code was carried forward from TGL and it used to follow the same
sequence.
Recently as part of s0ix hang issue, it was found that sending IOM
MCTP command as part of TCSS D3 Cold enter-exit sequence created an
issue.
We discovered that due to change in hardware sequence, ADL should not
set/reset IOM MCTP during D3 cold entry or exit. This patch removes the
bit setting from ASL file to prevent hang in the system.
This patch also removes obsolete Pcode mailbox communication which is
no longer required for ADL.
BUG=b:220796339
BRANCH=firmware-brya-14505.B
TEST=Check if hang issue is resolved with the CL and no other regression
observed
Change-Id: I2f066bcc4a8f475a15ddd12ef5ed87d7298312bb
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62861
Reviewed-by: Shobhit Srivastava <shobhit.srivastava@intel.corp-partner.google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/acpi')
-rw-r--r-- | src/soc/intel/alderlake/acpi/tcss.asl | 143 |
1 files changed, 1 insertions, 142 deletions
diff --git a/src/soc/intel/alderlake/acpi/tcss.asl b/src/soc/intel/alderlake/acpi/tcss.asl index 81c2432f66..c8cea84dd8 100644 --- a/src/soc/intel/alderlake/acpi/tcss.asl +++ b/src/soc/intel/alderlake/acpi/tcss.asl @@ -354,12 +354,6 @@ Scope (\_SB.PCI0) Offset(0x10), RBAR, 64 /* RegBar, offset 0x7110 in MCHBAR */ } - Field (MBAR, DWordAcc, NoLock, Preserve) - { - Offset(0x304), /* PRIMDN_MASK1_0_0_0_MCHBAR_IMPH, offset 0x7404 */ - , 31, - TCD3, 1 /* [31:31] TCSS IN D3 bit */ - } /* * Operation region defined to access the pCode mailbox interface. Get the MCHBAR @@ -396,101 +390,6 @@ Scope (\_SB.PCI0) } /* - * Method to send pCode MailBox command TCSS_DEVEN_MAILBOX_SUBCMD_GET_STATUS - * - * Result will be updated in DATA[1:0] - * DATA[0:0] TCSS_DEVEN_CURRENT_STATE: - * 0 - TCSS Deven in normal state. - * 1 - TCSS Deven is cleared by BIOS Mailbox request. - * DATA[1:1] TCSS_DEVEN_REQUEST_STATUS: - * 0 - IDLE. TCSS DEVEN has reached its final requested state. - * 1 - In Progress. TCSS DEVEN is currently in progress of switching state - * according to given request (bit 0 reflects source state). - * - * Return 0x00 - TCSS Deven in normal state - * 0x01 - TCSS Deven is cleared by BIOS Mailbox request - * 0x1x - TCSS Deven is in progress of switching state according to given request - * 0xFE - Command timeout - * 0xFF - Command corrupt - */ - Method (DSGS, 0) - { - If ((PMBY () == 0)) { - PMBC = MAILBOX_BIOS_CMD_TCSS_DEVEN_INTERFACE - PSCM = TCSS_DEVEN_MAILBOX_SUBCMD_GET_STATUS - PMBR = 1 - If (PMBY () == 0) { - Local0 = PMBD - Local1 = PMBC - Stall (10) - If ((Local0 != PMBD) || (Local1 != PMBC)) { - Printf("pCode MailBox is corrupt.") - Return (0xFF) - } - Return (Local0) - } Else { - Printf("pCode MailBox is not ready.") - Return (0xFE) - } - } Else { - Printf("pCode MailBox is not ready.") - Return (0xFE) - } - } - - /* - * Method to send pCode MailBox command TCSS_DEVEN_MAILBOX_SUBCMD_TCSS_CHANGE_REQ - * - * Arg0 : 0 - Restore to previously saved value of TCSS DEVEN - * 1 - Save current TCSS DEVEN value and clear it - * - * Return 0x00 - MAILBOX_BIOS_CMD_CLEAR_TCSS_DEVEN command completed - * 0xFD - Input argument is invalid - * 0xFE - Command timeout - * 0xFF - Command corrupt - */ - Method (DSCR, 1) - { - If (Arg0 > 1) { - Printf("pCode MailBox is corrupt.") - Return (0xFD) - } - If ((PMBY () == 0)) { - PMBC = MAILBOX_BIOS_CMD_TCSS_DEVEN_INTERFACE - PSCM = TCSS_DEVEN_MAILBOX_SUBCMD_TCSS_CHANGE_REQ - PMBD = Arg0 - PMBR = 1 - If ((PMBY () == 0)) { - Local0 = PMBD - Local1 = PMBC - Stall (10) - If ((Local0 != PMBD) || (Local1 != PMBC)) { - Printf("pCode MailBox is corrupt.") - Return (0xFF) - } - /* Poll TCSS_DEVEN_REQUEST_STATUS, timeout value is 10ms. */ - Local0 = 0 - While ((DSGS () & 0x10) && (Local0 < 100)) { - Stall (100) - Local0++ - } - If (Local0 == 100) { - Printf("pCode MailBox is not ready.") - Return (0xFE) - } Else { - Return (0x00) - } - } Else { - Printf("pCode MailBox is not ready.") - Return (0xFE) - } - } Else { - Printf("pCode MailBox is not ready.") - Return (0xFE) - } - } - - /* * IOM REG BAR Base address is in offset 0x7110 in MCHBAR. */ Method (IOMA, 0) @@ -697,26 +596,7 @@ Scope (\_SB.PCI0) } Else { - /* - * Program IOP MCTP Drop (TCSS_IN_D3) after D3 cold exit and - * acknowledgement by IOM. - */ - TCD3 = 0 - /* - * If the TCSS Deven is cleared by BIOS Mailbox request, then - * restore to previously saved value of TCSS DEVNE. - */ - Local0 = 0 - While (\_SB.PCI0.TXHC.VDID == 0xFFFFFFFF) { - If (DSGS () == 1) { - DSCR (0) - } - Local0++ - If (Local0 == 5) { - Printf("pCode mailbox command failed.") - Break - } - } + Printf("TCSS D3 exit."); } } Else { @@ -733,27 +613,6 @@ Scope (\_SB.PCI0) Return } - /* - * If the TCSS Deven in normal state, then Save current TCSS DEVEN value and - * clear it. - */ - Local0 = 0 - While (\_SB.PCI0.TXHC.VDID != 0xFFFFFFFF) { - If (DSGS () == 0) { - DSCR (1) - } - Local0++ - If (Local0 == 5) { - Printf("pCode mailbox command failed.") - Break - } - } - - /* - * Program IOM MCTP Drop (TCSS_IN_D3) in D3Cold entry before entering D3 cold. - */ - TCD3 = 1 - /* Request IOM for D3 cold entry sequence. */ TD3C = 1 } |