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author | Benjamin Doron <benjamin.doron00@gmail.com> | 2021-01-05 19:42:46 +0000 |
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committer | Michael Niewöhner <foss@mniewoehner.de> | 2021-02-10 17:45:15 +0000 |
commit | e166cb38bf8f01944bff435b5fef79f9f0b7a50d (patch) | |
tree | ea3e6877ccf1f4e48d696a6e98caaef64c8cbaf8 /src/soc/cavium/cn81xx | |
parent | d86db1ca8ec24e70d1c96e466df8fbf8ae79ea49 (diff) |
soc/intel/skylake/acpi: Add PEP table
PEP table is applicable to Skylake platform as well. It is required to
make the kernel load `intel_pmc_core`. Skylake boards can also use S0ix
hooks.
Tested on an out-of-tree Acer Aspire VN7-572G (Skylake-U),
intel_pmc_core kernel module is loaded and reports statuses predictably
via debugfs.
Change-Id: I08d8c1fde4f447e9292a0508649f802fdc2721e1
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49140
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/cavium/cn81xx')
0 files changed, 0 insertions, 0 deletions