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authorSubrata Banik <subratabanik@google.com>2022-02-06 18:39:54 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-02-15 17:16:32 +0000
commit112ffd764299580218a2b210ddb87c047ba185e4 (patch)
tree7940c5c73183d8894af965a65a9601232f272b8d /src/soc/cavium/cn81xx/mmu.c
parentb09166d0e62ba8ebe0c27bb7b1e20cac4885aa08 (diff)
soc/intel/skylake: Add function to clear PMCON status bits
This patch adds an SoC function to clear GEN_PMCON_A status bits to align with other IA coreboot implementations. Additionally, move the PMCON status bit clear operation to finalize.c to cover any such chances where FSP-S NotifyPhase requested a global reset and PMCON status bit remains set. BUG=b:211954778 TEST=None. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ie786e6ba2daf88accb5d70be33de0abe593f8c53 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61650 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/cavium/cn81xx/mmu.c')
0 files changed, 0 insertions, 0 deletions