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authorFelix Held <felix-coreboot@felixheld.de>2023-01-17 02:50:06 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-01-18 14:05:58 +0000
commit192945e61cef3f90b0a7464b98801b4bd0150ff7 (patch)
treeb9b96b3383d443a060e6b647087bd4c3b22cdb25 /src/soc/amd
parent19f4c39cfe106fe11a9abb3fe80f41f3917db316 (diff)
soc/amd/phoenix/agesa_acpi: use acpi_align_current to align IVRS & ALIB
This changes the alignment of the IVRS table from 8 bytes to 16 bytes and aligns the ALIB table to a 16 byte boundary. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I766260aefcac6876609d6b45202b41a3e9e44385 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72025 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd')
-rw-r--r--src/soc/amd/phoenix/agesa_acpi.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/amd/phoenix/agesa_acpi.c b/src/soc/amd/phoenix/agesa_acpi.c
index 8838d9dc49..3c58a20f58 100644
--- a/src/soc/amd/phoenix/agesa_acpi.c
+++ b/src/soc/amd/phoenix/agesa_acpi.c
@@ -16,10 +16,11 @@ uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current
acpi_ivrs_t *ivrs;
/* add ALIB SSDT from HOB */
+ current = acpi_align_current(current);
current = add_agesa_fsp_acpi_table(AMD_FSP_ACPI_ALIB_HOB_GUID, "ALIB", rsdp, current);
/* IVRS */
- current = ALIGN_UP(current, 8);
+ current = acpi_align_current(current);
ivrs = (acpi_ivrs_t *)current;
acpi_create_ivrs(ivrs, acpi_fill_ivrs);
current += ivrs->header.length;