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authorMarshall Dawson <marshalldawson3rd@gmail.com>2017-09-22 15:14:46 -0600
committerMartin Roth <martinroth@google.com>2017-09-30 20:34:28 +0000
commite9b862eb2c5918f097ff03498959e74130671c67 (patch)
tree494fb0ecd48c3212bfd1d68ea9ee9d85782df780 /src/soc/amd/stoneyridge/include
parent6746d3784fb0c1c79c71b3f1c24a2bf59f75a2d0 (diff)
amd/stoneyridge: Use generic SMM command port values
Remove the old Hudson-specific SMM command port definitions and use the ones in cpu/x86/smm.h. Change-Id: I3de9a178e5f189ac1dbc921e41b69d47e3796a4f Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/21741 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 20edf5f4cc..9f353fbdfd 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -66,13 +66,6 @@
#define ACPI_GPE0_BLK (STONEYRIDGE_ACPI_IO_BASE + 0x10) /* 8 bytes */
#define ACPI_CPU_CONTROL (STONEYRIDGE_ACPI_IO_BASE + 0x08) /* 6 bytes */
-#define ACPI_SMI_CTL_PORT 0xb2
-#define ACPI_SMI_CMD_CST_CONTROL 0xde
-#define ACPI_SMI_CMD_PST_CONTROL 0xad
-#define ACPI_SMI_CMD_DISABLE 0xbe
-#define ACPI_SMI_CMD_ENABLE 0xef
-#define ACPI_SMI_CMD_S4_REQ 0xc0
-
#define REV_STONEYRIDGE_A11 0x11
#define REV_STONEYRIDGE_A12 0x12