diff options
| author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-08-24 16:48:20 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-08-30 14:47:52 +0000 |
| commit | 6635b3d9a1d81aeebb215e28cdf19be858dad3c3 (patch) | |
| tree | 91d369ee3080d27c4ac154709a6510272a495882 /src/soc/amd/stoneyridge/include | |
| parent | 8120759d90f7e5164a600f21bdd04b8878ba8259 (diff) | |
soc/amd/stoneyridge/enable_usbdebug.c: Update pci_ehci_dbg_set_port()
Function pci_ehci_dbg_set_port() used NDA register DEBUGPORT_MISC_CONTROL,
which was deprecated in favor of a public PCI register (though only the
bits to enable debug port became public) 0x90. Therefore code needs to be
updated.
BUG=b:69231009
TEST=Build and boot grunt.
Change-Id: Ibb25992729d984b8570712f91a03a7cd1e9b8643
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/28344
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/include')
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 530b93a3e4..f054b3b61e 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -305,6 +305,11 @@ #define OC_PORT2_SHIFT 8 #define OC_PORT3_SHIFT 12 +#define EHCI_HUB_CONFIG4 0x90 +#define DEBUG_PORT_SELECT_SHIFT 16 +#define DEBUG_PORT_ENABLE BIT(18) +#define DEBUG_PORT_MASK (BIT(16) | BIT(17) | (BIT(18)) + #define WIDEIO_RANGE_ERROR -1 #define TOTAL_WIDEIO_PORTS 3 |