diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2024-08-07 16:39:36 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-08-08 17:42:05 +0000 |
| commit | ab7410a4d00c3c236b14c7ecb23822fc2c7939d8 (patch) | |
| tree | bdc8cf415d7d72aafb4d1ae4abd685089255850d /src/soc/amd/stoneyridge/Makefile.mk | |
| parent | bcc9ad50f91db278fa11e408ba5ac575437b10bb (diff) | |
soc/amd/*: pass PSP NVRAM base and size to amdfwtool
Pass the PSP NVRAM base and size to amdfwtool for all SoCs except Genoa
which doesn't use/support this. This was previously only implemented for
Picasso, but not for the SoCs that support this, so add the support to
those other SoCs as well.
If a mainboard has an section named 'PSP_NVRAM' in its FMAP file, the
start and length of it in the flash will be passed to amdfwtool which
then adds the base and length to the corresponding type 0x04 PSP
directory table entry.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I785ede8eb0df2473a4390b2c305add20f38d7ede
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83814
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/Makefile.mk')
| -rw-r--r-- | src/soc/amd/stoneyridge/Makefile.mk | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.mk b/src/soc/amd/stoneyridge/Makefile.mk index c1c74ea2ea..e079fa3185 100644 --- a/src/soc/amd/stoneyridge/Makefile.mk +++ b/src/soc/amd/stoneyridge/Makefile.mk @@ -92,8 +92,16 @@ endif # CONFIG_AMD_APU_PRAIRIEFALCON endif # CONFIG_AMD_APU_MERLINFALCON endif # CONFIG_AMD_APU_STONEYRIDGE +# type = 0x04 +# The flashmap section used for this is expected to be named PSP_NVRAM +PSP_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_START) +PSP_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_SIZE) + add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) +OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base) +OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size) + OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci) OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE), --gec) @@ -124,6 +132,8 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \ rm -f $@ @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" $(AMDFWTOOL) \ + $(OPT_PSP_NVRAM_BASE) \ + $(OPT_PSP_NVRAM_SIZE) \ $(OPT_STONEYRIDGE_XHCI_FWM_FILE) \ $(OPT_STONEYRIDGE_GEC_FWM_FILE) \ $(OPT_PSP_USE_PSPSECUREOS) \ |