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authorArthur Heymans <arthur@aheymans.xyz>2022-05-23 16:06:06 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-05-24 22:36:17 +0000
commitdd7ec09155c8aaa527d070309a8439bff87d2985 (patch)
treece9215d13f1129957758d6d5d2872c78aa17bc8e /src/soc/amd/stoneyridge/Kconfig
parent743627fba20e5a7dadb165340391e4afa8ae5996 (diff)
soc/amd/stoneyridge: Move BERT into a cbmem region
This removes the need to align BERT so that TSEG remains aligned. Change-Id: I21b55a87838dcb4bd4099f051ba0a011a4d41eea Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64601 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/stoneyridge/Kconfig')
-rw-r--r--src/soc/amd/stoneyridge/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 7bc5ad9c55..0127ac3cec 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -373,4 +373,12 @@ config DISABLE_KEYBOARD_RESET_PIN
functionality isn't disabled, configuring it as an output and driving
it as 0 will cause a reset.
+config ACPI_BERT_SIZE
+ hex
+ default 0x100000 if ACPI_BERT
+ default 0x0
+ help
+ Specify the amount of DRAM reserved for gathering the data used to
+ generate the ACPI table.
+
endif # SOC_AMD_STONEYRIDGE