diff options
| author | Marc Jones <marc.jones@scarletltd.com> | 2018-04-25 16:43:18 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-27 09:13:31 +0000 |
| commit | 4c887eaebae579ccf3cd95abd976911b4a238ce6 (patch) | |
| tree | d353188750844963b85ca022c659b4b78f8f15d6 /src/soc/amd/stoneyridge/Kconfig | |
| parent | 99fe7d243df0a234a96ae7b0febd827d773ab33a (diff) | |
soc/amd/stoneyridge: Enable CMOS VBNV backup to flash
Now that we have SPI flash writes working, we can support
VBOOT_VBNV_CMOS_BACKUP_TO_FLASH. This requires the mainboard to reserve
the area in FMAP.
BUG=b:77347873
TEST=Manually clear CMOS and check coreboot restores VBNV from flash.
Change-Id: I488dbfc4c200f5100374d47feb0a0522e6a60e88
Signed-off-by: Marc Jones <marc.jones@scarletltd.com>
Reviewed-on: https://review.coreboot.org/25842
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge/Kconfig')
| -rw-r--r-- | src/soc/amd/stoneyridge/Kconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index e723296ae4..f544796aab 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -55,6 +55,7 @@ config CPU_SPECIFIC_OPTIONS select C_ENVIRONMENT_BOOTBLOCK select BOOTBLOCK_CONSOLE select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH + select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select RELOCATABLE_MODULES select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select PARALLEL_MP @@ -72,6 +73,8 @@ config VBOOT select VBOOT_SEPARATE_VERSTAGE select VBOOT_STARTS_IN_BOOTBLOCK select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOT + select VBOOT_VBNV_CMOS + select VBOOT_VBNV_CMOS_BACKUP_TO_FLASH config UDELAY_LAPIC_FIXED_FSB int |