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authorFelix Held <felix-coreboot@felixheld.de>2022-02-22 23:00:18 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-02-24 00:14:02 +0000
commit6f413d1c3fdc0edbbe52fef0a035b4ac89e3c5c6 (patch)
tree6d184f5e1e3236d2fc7b44228667dee74369c3f6 /src/soc/amd/sabrina
parent47722cfe554dc9f1f9ca56a88c57a283357f71ce (diff)
soc/amd/*/include/soc/iomap.h: rework HPET base address check
The AMD SoCs had a check to make sure that HPET_ADDRESS_OVERRIDE isn't set so that the HPET_ADDRESS Kconfig option will have the right default value. Instead check if the HPET_ADDRESS Kconfig value matches the HPET_BASE_ADDRESS define in the SoC code which is the case if HPET_ADDRESS_OVERRIDE isn't selected. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Icf1832eb36c031e93ba24f342e9a8a7bf13faecc Reviewed-on: https://review.coreboot.org/c/coreboot/+/62275 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/sabrina')
-rw-r--r--src/soc/amd/sabrina/include/soc/iomap.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/sabrina/include/soc/iomap.h b/src/soc/amd/sabrina/include/soc/iomap.h
index 0ea2a52fe9..9854986bca 100644
--- a/src/soc/amd/sabrina/include/soc/iomap.h
+++ b/src/soc/amd/sabrina/include/soc/iomap.h
@@ -15,10 +15,10 @@
#define GNB_IO_APIC_ADDR 0xfec01000
#define SPI_BASE_ADDRESS 0xfec10000
-#if CONFIG(HPET_ADDRESS_OVERRIDE)
-#error HPET address override is not allowed and must be fixed at 0xfed00000
-#endif
#define HPET_BASE_ADDRESS 0xfed00000
+#if CONFIG_HPET_ADDRESS != HPET_BASE_ADDRESS
+#error HPET address must be 0xfed00000
+#endif
/* FCH AL2AHB Registers */
#define ALINK_AHB_ADDRESS 0xfedc0000