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authorElyes Haouas <ehaouas@noos.fr>2022-02-16 16:48:48 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-02-17 17:12:49 +0000
commit0ff941dd2029494817ab4e8778574cbbb44e298a (patch)
tree0e9706b4125ffc10974155b26cda4886e380c9e4 /src/soc/amd/sabrina
parent5b0103f9b507f9825a383d31376f4ac7762af738 (diff)
src/soc: Remove space before tab
Spaces before tabs are not allowed. Change-Id: I0d2c55c2e0108e59facd92b2e2c0f6c418ef6db0 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62055 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/sabrina')
-rw-r--r--src/soc/amd/sabrina/acpi/pci0.asl2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/sabrina/acpi/pci0.asl b/src/soc/amd/sabrina/acpi/pci0.asl
index 853c686de0..e729ba38ff 100644
--- a/src/soc/amd/sabrina/acpi/pci0.asl
+++ b/src/soc/amd/sabrina/acpi/pci0.asl
@@ -5,7 +5,7 @@
Device(PCI0) {
Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
- External(TOM1, IntObj) /* Generated by root_complex.c */
+ External(TOM1, IntObj) /* Generated by root_complex.c */
Method(_BBN, 0, NotSerialized) {
Return(Zero) /* Bus number = 0 */