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authorFelix Held <felix-coreboot@felixheld.de>2021-02-10 02:26:10 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-02-11 01:44:24 +0000
commitbc134812c3038b001d6b8a6c9fd30b1574e8517a (patch)
tree66cdd9b1bed347edde9f59a352ca45ed074efb8d /src/soc/amd/picasso
parenta6fc2125e78eb7db537733ee7d33f59e723a27c1 (diff)
soc/amd: factor out common SMM relocation code
The common code gets moved to soc/amd/common/block/cpu/smm, since it is related to the CPU cores and soc/amd/common/block/smi is about the SMI/ SCI functionality in the FCH part. Also relocation_handler gets renamed to smm_relocation_handler to keep it clear what it does, since it got moved to another compilation unit. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I45224131dfd52247018c5ca19cb37c44062b03eb Reviewed-on: https://review.coreboot.org/c/coreboot/+/50462 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r--src/soc/amd/picasso/Kconfig1
-rw-r--r--src/soc/amd/picasso/cpu.c50
2 files changed, 3 insertions, 48 deletions
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 4868d84d3c..f504d09297 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -42,6 +42,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_SATA
select SOC_AMD_COMMON_BLOCK_SMBUS
select SOC_AMD_COMMON_BLOCK_SMI
+ select SOC_AMD_COMMON_BLOCK_SMM
select SOC_AMD_COMMON_BLOCK_SMU
select SOC_AMD_COMMON_BLOCK_SPI
select SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c
index 8ee065d685..088660ea7a 100644
--- a/src/soc/amd/picasso/cpu.c
+++ b/src/soc/amd/picasso/cpu.c
@@ -1,13 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/cpu.h>
+#include <amdblocks/smm.h>
#include <cpu/cpu.h>
#include <cpu/x86/mp.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/smm.h>
-#include <cpu/amd/msr.h>
-#include <cpu/amd/amd64_save_state.h>
#include <cpu/x86/lapic.h>
#include <device/device.h>
#include <device/pci_ops.h>
@@ -22,12 +21,6 @@
/*
* MP and SMM loading initialization.
*/
-struct smm_relocation_params {
- msr_t tseg_base;
- msr_t tseg_mask;
-};
-
-static struct smm_relocation_params smm_reloc_params;
/*
* Do essential initialization tasks before APs can be fired up -
@@ -42,45 +35,6 @@ static void pre_mp_init(void)
x86_mtrr_check();
}
-static void fill_in_relocation_params(struct smm_relocation_params *params)
-{
- uintptr_t tseg_base;
- size_t tseg_size;
-
- smm_region(&tseg_base, &tseg_size);
-
- params->tseg_base.lo = ALIGN_DOWN(tseg_base, 128 * KiB);
- params->tseg_base.hi = 0;
- params->tseg_mask.lo = ALIGN_DOWN(~(tseg_size - 1), 128 * KiB);
- params->tseg_mask.hi = ((1 << (cpu_phys_address_size() - 32)) - 1);
-
- params->tseg_mask.lo |= SMM_TSEG_WB;
-}
-
-static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
- size_t *smm_save_state_size)
-{
- printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
-
- fill_in_relocation_params(&smm_reloc_params);
-
- smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
- *smm_save_state_size = sizeof(amd64_smm_state_save_area_t);
-}
-
-static void relocation_handler(int cpu, uintptr_t curr_smbase,
- uintptr_t staggered_smbase)
-{
- struct smm_relocation_params *relo_params = &smm_reloc_params;
- amd64_smm_state_save_area_t *smm_state;
-
- wrmsr(SMM_ADDR_MSR, relo_params->tseg_base);
- wrmsr(SMM_MASK_MSR, relo_params->tseg_mask);
-
- smm_state = (void *)(SMM_AMD64_SAVE_STATE_OFFSET + curr_smbase);
- smm_state->smbase = staggered_smbase;
-}
-
static void post_mp_init(void)
{
global_smi_enable();
@@ -91,7 +45,7 @@ static const struct mp_ops mp_ops = {
.pre_mp_init = pre_mp_init,
.get_cpu_count = get_cpu_count,
.get_smm_info = get_smm_info,
- .relocation_handler = relocation_handler,
+ .relocation_handler = smm_relocation_handler,
.post_mp_init = post_mp_init,
};