diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-17 23:37:49 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-30 09:19:10 +0000 |
| commit | 0c1dd9c84188cc150a05302cc9b4af476a761d2b (patch) | |
| tree | cf8249cc3ba689e903c64d926c162c1e1f742d78 /src/soc/amd/picasso | |
| parent | bc1cb38ce15e059988263b04c0ea751ddf4b052d (diff) | |
ACPI: Drop typedef global_nvs_t
Bring all GNVS related initialisation function to global
scope to force identical signatures. Followup work is
likely to remove some as duplicates.
Change-Id: Id4299c41d79c228f3d35bc7cb9bf427ce1e82ba1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42489
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso')
| -rw-r--r-- | src/soc/amd/picasso/acpi.c | 5 | ||||
| -rw-r--r-- | src/soc/amd/picasso/include/soc/acpi.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/picasso/include/soc/nvs.h | 9 | ||||
| -rw-r--r-- | src/soc/amd/picasso/southbridge.c | 4 |
4 files changed, 10 insertions, 10 deletions
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 75509eb4c1..3c22f1d123 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -7,6 +7,7 @@ #include <string.h> #include <console/console.h> #include <acpi/acpi.h> +#include <acpi/acpi_gnvs.h> #include <acpi/acpigen.h> #include <device/pci_ops.h> #include <arch/ioapic.h> @@ -244,7 +245,7 @@ unsigned long southbridge_write_acpi_tables(const struct device *device, return acpi_write_hpet(device, current, rsdp); } -static void acpi_create_gnvs(struct global_nvs_t *gnvs) +void acpi_create_gnvs(struct global_nvs *gnvs) { /* Clear out GNVS. */ memset(gnvs, 0, sizeof(*gnvs)); @@ -268,7 +269,7 @@ static void acpi_create_gnvs(struct global_nvs_t *gnvs) void southbridge_inject_dsdt(const struct device *device) { - struct global_nvs_t *gnvs; + struct global_nvs *gnvs; gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); diff --git a/src/soc/amd/picasso/include/soc/acpi.h b/src/soc/amd/picasso/include/soc/acpi.h index e5bc3f3ad4..09f60d7280 100644 --- a/src/soc/amd/picasso/include/soc/acpi.h +++ b/src/soc/amd/picasso/include/soc/acpi.h @@ -8,8 +8,6 @@ unsigned long southbridge_write_acpi_tables(const struct device *device, unsigned long current, struct acpi_rsdp *rsdp); -void southbridge_inject_dsdt(const struct device *device); - uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, acpi_rsdp_t *rsdp); diff --git a/src/soc/amd/picasso/include/soc/nvs.h b/src/soc/amd/picasso/include/soc/nvs.h index 83f6afb289..214ab1d0bc 100644 --- a/src/soc/amd/picasso/include/soc/nvs.h +++ b/src/soc/amd/picasso/include/soc/nvs.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ /* - * NOTE: The layout of the global_nvs_t structure below must match the layout + * NOTE: The layout of the global_nvs structure below must match the layout * in soc/soc/amd/picasso/acpi/globalnvs.asl !!! * */ @@ -14,7 +14,7 @@ #include <vendorcode/google/chromeos/gnvs.h> #include <soc/southbridge.h> -typedef struct global_nvs_t { +struct __packed global_nvs { /* Miscellaneous */ uint8_t pcnt; /* 0x00 - Processor Count */ uint8_t ppcm; /* 0x01 - Max PPC State */ @@ -41,7 +41,8 @@ typedef struct global_nvs_t { /* ChromeOS specific (0x100 - 0xfff) */ chromeos_acpi_t chromeos; -} __packed global_nvs_t; -check_member(global_nvs_t, chromeos, GNVS_CHROMEOS_ACPI_OFFSET); +}; + +check_member(global_nvs, chromeos, GNVS_CHROMEOS_ACPI_OFFSET); #endif /* __SOC_PICASSO_NVS_H__ */ diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c index 45f66d6b5b..cb22195546 100644 --- a/src/soc/amd/picasso/southbridge.c +++ b/src/soc/amd/picasso/southbridge.c @@ -303,7 +303,7 @@ static int get_index_bit(uint32_t value, uint16_t limit) static void set_nvs_sws(void *unused) { struct soc_power_reg *sws; - struct global_nvs_t *gnvs; + struct global_nvs *gnvs; int index; sws = cbmem_find(CBMEM_ID_POWER_STATE); @@ -337,7 +337,7 @@ void southbridge_init(void *chip_info) static void set_sb_final_nvs(void) { - struct global_nvs_t *gnvs = acpi_get_gnvs(); + struct global_nvs *gnvs = acpi_get_gnvs(); if (gnvs == NULL) return; |