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| author | Ashish Kumar Mishra <ashish.k.mishra@intel.com> | 2024-05-13 14:55:35 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-05-14 19:48:55 +0000 |
| commit | 5a86707417689edb20b163b5a469d9848de2506e (patch) | |
| tree | 73ccfa97855ab2636a3e72156c1e0d2254dbbc97 /src/soc/amd/phoenix/uart.c | |
| parent | f1e4067a90e433eb0e726a2c1a3e7027d0acb50e (diff) | |
soc/intel/common: Add RPL tracehub support
Add PCI ID for RPL tracehub and update the PCI ID in the
pci_device_ids[] in tracehub.c.
Reference:
Raptor Lake External Design Specification Volume 1 (640555)
BUG=None
TEST=Verified on brox
Change-Id: I5d5c6c8ff44bcb5a7bbbd3e27a1577c169ecd6a9
Signed-off-by: Ashish Kumar Mishra <ashish.k.mishra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82415
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/amd/phoenix/uart.c')
0 files changed, 0 insertions, 0 deletions