diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2024-08-07 16:39:36 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-08-08 17:42:05 +0000 |
| commit | ab7410a4d00c3c236b14c7ecb23822fc2c7939d8 (patch) | |
| tree | bdc8cf415d7d72aafb4d1ae4abd685089255850d /src/soc/amd/glinda | |
| parent | bcc9ad50f91db278fa11e408ba5ac575437b10bb (diff) | |
soc/amd/*: pass PSP NVRAM base and size to amdfwtool
Pass the PSP NVRAM base and size to amdfwtool for all SoCs except Genoa
which doesn't use/support this. This was previously only implemented for
Picasso, but not for the SoCs that support this, so add the support to
those other SoCs as well.
If a mainboard has an section named 'PSP_NVRAM' in its FMAP file, the
start and length of it in the flash will be passed to amdfwtool which
then adds the base and length to the corresponding type 0x04 PSP
directory table entry.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I785ede8eb0df2473a4390b2c305add20f38d7ede
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83814
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/glinda')
| -rw-r--r-- | src/soc/amd/glinda/Makefile.mk | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/amd/glinda/Makefile.mk b/src/soc/amd/glinda/Makefile.mk index b3c5b82517..14b6ecc3c9 100644 --- a/src/soc/amd/glinda/Makefile.mk +++ b/src/soc/amd/glinda/Makefile.mk @@ -85,6 +85,11 @@ endif # Use additional Soft Fuse bits specified in Kconfig PSP_SOFTFUSE_BITS += $(call strip_quotes, $(CONFIG_PSP_SOFTFUSE_BITS)) +# type = 0x04 +# The flashmap section used for this is expected to be named PSP_NVRAM +PSP_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_START) +PSP_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_SIZE) + # type = 0x3a ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y) PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE) @@ -157,6 +162,9 @@ PSP_SOFTFUSE=$(shell A=$(call int-add, \ add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) +OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base) +OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size) + OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage) OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig) @@ -192,6 +200,8 @@ OPT_SPL_RW_AB_TABLE_FILE=$(call add_opt_prefix, $(SPL_RW_AB_TABLE_FILE), --spl-t OPT_RECOVERY_AB_SINGLE_COPY=$(if $(CONFIG_VBOOT_SLOTS_RW_AB), --recovery-ab-single-copy) AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ + $(OPT_PSP_NVRAM_BASE) \ + $(OPT_PSP_NVRAM_SIZE) \ $(OPT_APOB_ADDR) \ $(OPT_DEBUG_AMDFWTOOL) \ $(OPT_PSP_BIOSBIN_FILE) \ |