diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2024-03-22 16:16:18 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-03-23 21:23:47 +0000 |
| commit | 556373e354eda76e74d30cc9221ea6fa4c88a048 (patch) | |
| tree | c7761b992d1fed1f2c2c300de2a9c8eed187a5d6 /src/soc/amd/genoa_poc | |
| parent | ca11545ca6d6bbc399cacc0c56b0212880fdeafb (diff) | |
soc/amd/*/memmap: factor out common read_lower_soc_memmap_resources
Since the code for reporting the memory map below cbmem_top is basically
identical for all non-CAR AMD SoCs, factor this out into a common
read_lower_soc_memmap_resources implementation.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id64462b97d144ccdf78ebb051d82a4aa37f8ee98
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81389
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/genoa_poc')
| -rw-r--r-- | src/soc/amd/genoa_poc/domain.c | 24 |
1 files changed, 1 insertions, 23 deletions
diff --git a/src/soc/amd/genoa_poc/domain.c b/src/soc/amd/genoa_poc/domain.c index 61549082e8..88f386c2c1 100644 --- a/src/soc/amd/genoa_poc/domain.c +++ b/src/soc/amd/genoa_poc/domain.c @@ -7,7 +7,6 @@ #include <amdblocks/root_complex.h> #include <amdblocks/smn.h> #include <arch/ioapic.h> -#include <cbmem.h> #include <console/console.h> #include <device/device.h> #include <types.h> @@ -18,28 +17,7 @@ void read_soc_memmap_resources(struct device *domain, unsigned long *idx) { - ram_from_to(domain, (*idx)++, 0, 0xa0000); - mmio_from_to(domain, (*idx)++, 0xa0000, 0xc0000); // legacy VGA - reserved_ram_from_to(domain, (*idx)++, 0xc0000, 1 * MiB); // Option ROM - - uint32_t mem_usable = (uintptr_t)cbmem_top(); - uintptr_t early_reserved_dram_start, early_reserved_dram_end; - const struct memmap_early_dram *e = memmap_get_early_dram_usage(); - - early_reserved_dram_start = e->base; - early_reserved_dram_end = e->base + e->size; - - // 1MB - bottom of DRAM reserved for early coreboot usage - ram_from_to(domain, (*idx)++, 1 * MiB, early_reserved_dram_start); - - // DRAM reserved for early coreboot usage - reserved_ram_from_to(domain, (*idx)++, early_reserved_dram_start, - early_reserved_dram_end); - - // top of DRAM consumed early - low top usable RAM - // cbmem_top() accounts for low UMA and TSEG if they are used. - ram_from_to(domain, (*idx)++, early_reserved_dram_end, - mem_usable); + read_lower_soc_memmap_resources(domain, idx); add_opensil_memmap(domain, idx); } |