vc/amd/opensil: introduce common mpio/chip.h header file

The chip drivers in the devicetree use the path where the corresponding
chip.h file resides both to include this chip.h file in the static.c
generated by util/sconfig from the devicetree and also for the names of
the chip config and chip ops struct. To be able to build a SoC using
either the MPIO chip driver from the openSIL stub or from the actual
openSIL glue code without needing different devicetree files for the
different cases, introduce a common MPIO chip.h file that then includes
the correct MPIO header file. The chip config and ops structures also
need to be renamed to take this change into account.

Thanks to Matt for pointing out how to make the path to the actual MPIO
chip.h file configurable via a Kconfig setting. This allows overriding
this path from site-local without the need to have any reference to
site-local in the upstream code.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iead97d1727569ec0d23a2b9c4fd96daff4bebcf6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82262
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 80 insertions, 80 deletions

diff --git a/src/soc/amd/genoa_poc/chipset.cb b/src/soc/amd/genoa_poc/chipset.cb
index 92dcb5df96..832b9b6f4a 100644
--- a/src/soc/amd/genoa_poc/chipset.cb
+++ b/src/soc/amd/genoa_poc/chipset.cb
@@ -16,78 +16,78 @@ chip soc/amd/genoa_poc
 		device pci 00.3 alias rcec_0 off end
 
 		device pci 01.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.1 alias gpp_bridge_0_0_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.2 alias gpp_bridge_0_1_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.3 alias gpp_bridge_0_2_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.4 alias gpp_bridge_0_3_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.5 alias gpp_bridge_0_4_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.6 alias gpp_bridge_0_5_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.7 alias gpp_bridge_0_6_a off end
 		end
 
 		device pci 02.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 02.1 alias gpp_bridge_0_7_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 02.2 alias gpp_bridge_0_8_a off end
 		end
 
 		device pci 03.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.1 alias gpp_bridge_0_0_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.2 alias gpp_bridge_0_1_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.3 alias gpp_bridge_0_2_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.4 alias gpp_bridge_0_3_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.5 alias gpp_bridge_0_4_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.6 alias gpp_bridge_0_5_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.7 alias gpp_bridge_0_6_b off end
 		end
 
 		device pci 04.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 04.1 alias gpp_bridge_0_7_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 04.2 alias gpp_bridge_0_8_b off end
 		end
 
 		device pci 05.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 05.1 alias gpp_bridge_0_0_c off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 05.2 alias gpp_bridge_0_1_c off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 05.3 alias gpp_bridge_0_2_c off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 05.4 alias gpp_bridge_0_3_c off end
 		end
 
@@ -128,64 +128,64 @@ chip soc/amd/genoa_poc
 		device pci 00.3 alias rcec_1 off end
 
 		device pci 01.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.1 alias gpp_bridge_1_0_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.2 alias gpp_bridge_1_1_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.3 alias gpp_bridge_1_2_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.4 alias gpp_bridge_1_3_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.5 alias gpp_bridge_1_4_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.6 alias gpp_bridge_1_5_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.7 alias gpp_bridge_1_6_a off end
 		end
 
 		device pci 02.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 02.1 alias gpp_bridge_1_7_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 02.2 alias gpp_bridge_1_8_a off end
 		end
 
 		device pci 03.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.1 alias gpp_bridge_1_0_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.2 alias gpp_bridge_1_1_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.3 alias gpp_bridge_1_2_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.4 alias gpp_bridge_1_3_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.5 alias gpp_bridge_1_4_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.6 alias gpp_bridge_1_5_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.7 alias gpp_bridge_1_6_b off end
 		end
 
 		device pci 04.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 04.1 alias gpp_bridge_1_7_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 04.2 alias gpp_bridge_1_8_b off end
 		end
 
@@ -207,64 +207,64 @@ chip soc/amd/genoa_poc
 		device pci 00.3 alias rcec_2 off end
 
 		device pci 01.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.1 alias gpp_bridge_2_0_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.2 alias gpp_bridge_2_1_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.3 alias gpp_bridge_2_2_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.4 alias gpp_bridge_2_3_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.5 alias gpp_bridge_2_4_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.6 alias gpp_bridge_2_5_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.7 alias gpp_bridge_2_6_a off end
 		end
 
 		device pci 02.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 02.1 alias gpp_bridge_2_7_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 02.2 alias gpp_bridge_2_8_a off end
 		end
 
 		device pci 03.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.1 alias gpp_bridge_2_0_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.2 alias gpp_bridge_2_1_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.3 alias gpp_bridge_2_2_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.4 alias gpp_bridge_2_3_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.5 alias gpp_bridge_2_4_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.6 alias gpp_bridge_2_5_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.7 alias gpp_bridge_2_6_b off end
 		end
 
 		device pci 04.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 04.1 alias gpp_bridge_2_7_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 04.2 alias gpp_bridge_2_8_b off end
 		end
 
@@ -286,78 +286,78 @@ chip soc/amd/genoa_poc
 		device pci 00.3 alias rcec_3 off end
 
 		device pci 01.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.1 alias gpp_bridge_3_0_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.2 alias gpp_bridge_3_1_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.3 alias gpp_bridge_3_2_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.4 alias gpp_bridge_3_3_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.5 alias gpp_bridge_3_4_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.6 alias gpp_bridge_3_5_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 01.7 alias gpp_bridge_3_6_a off end
 		end
 
 		device pci 02.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 02.1 alias gpp_bridge_3_7_a off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 02.2 alias gpp_bridge_3_8_a off end
 		end
 
 		device pci 03.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.1 alias gpp_bridge_3_0_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.2 alias gpp_bridge_3_1_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.3 alias gpp_bridge_3_2_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.4 alias gpp_bridge_3_3_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.5 alias gpp_bridge_3_4_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.6 alias gpp_bridge_3_5_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 03.7 alias gpp_bridge_3_6_b off end
 		end
 
 		device pci 04.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 04.1 alias gpp_bridge_3_7_b off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 04.2 alias gpp_bridge_3_8_b off end
 		end
 
 		device pci 05.0 on end # Dummy device function, do not disable
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 05.1 alias gpp_bridge_3_0_c off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 05.2 alias gpp_bridge_3_1_c off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 05.3 alias gpp_bridge_3_2_c off end
 		end
-		chip vendorcode/amd/opensil/genoa_poc/mpio
+		chip vendorcode/amd/opensil/chip/mpio
 			device pci 05.4 alias gpp_bridge_3_3_c off end
 		end