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authorFelix Held <felix-coreboot@felixheld.de>2021-03-25 00:51:39 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-03-29 18:57:03 +0000
commitf4e90e8a611a8ce29e3a990923ccdb99b919c21c (patch)
treed6c6ad9d737272db0c6cb6e141013af2ccbeef89 /src/soc/amd/common
parentc1042ba2c5dc19194a75a87f1e717f411582dc9a (diff)
soc/amd/common/block/acpimmio/mmio_util: add fch_disable_kb_rst
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Suggested-by: Kangheui Won <khwon@chromium.org> Change-Id: Ie65e39ffb8c353415f5b68e1e0f378d18eeb7498 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51784 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common')
-rw-r--r--src/soc/amd/common/block/acpimmio/mmio_util.c5
-rw-r--r--src/soc/amd/common/block/include/amdblocks/acpimmio.h1
2 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/acpimmio/mmio_util.c b/src/soc/amd/common/block/acpimmio/mmio_util.c
index cfe877952a..c0b29fa992 100644
--- a/src/soc/amd/common/block/acpimmio/mmio_util.c
+++ b/src/soc/amd/common/block/acpimmio/mmio_util.c
@@ -93,6 +93,11 @@ void fch_configure_hpet(void)
pm_write32(PM_DECODE_EN, reg);
}
+void fch_disable_kb_rst(void)
+{
+ pm_write8(PM_RST_CTRL1, pm_read8(PM_RST_CTRL1) & ~KBRSTEN);
+}
+
/* PM registers are accessed a byte at a time via CD6/CD7 */
uint8_t pm_io_read8(uint8_t reg)
{
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
index 2e1da882c0..9360650851 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
@@ -87,6 +87,7 @@ void fch_disable_legacy_dma_io(void);
void fch_io_enable_legacy_io(void);
void fch_enable_ioapic_decode(void);
void fch_configure_hpet(void);
+void fch_disable_kb_rst(void);
/* Access PM registers using IO cycles */
uint8_t pm_io_read8(uint8_t reg);