diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-06-20 19:17:43 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-06-23 21:58:34 +0000 |
| commit | 47ed2714c8130456ab666b14eb4b5c6f606d559a (patch) | |
| tree | 53fe5a7ddf2961dd8716c75ca473ed9a5110c66b /src/soc/amd/common | |
| parent | 87a9d8ffe641480c86eb8e856480692748930b8e (diff) | |
soc/amd/common/block/acpi/ivrs: conditionally generate eMMC entry
The eMMC entry in the IVRS table should only be generated if an eMMC
controller is present in the SoC.
Where the PCI_DEVFN(0x13, 1) is from is currently unclear to me. There
is no PCI device 0x13 on bus 0 and the eMMC controller is also an MMIO
device and not a PCI device, but this is what the reference code does.
My guess would be that it mainly needs to be a unique PCI device that
won't collide with any existing PCI device in the SoC. Add a comment
about this too.
TEST=None
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I00865cb7caf82547e89eb5e77817e3d8ca5d35dd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75933
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/soc/amd/common')
| -rw-r--r-- | src/soc/amd/common/block/acpi/ivrs.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/src/soc/amd/common/block/acpi/ivrs.c b/src/soc/amd/common/block/acpi/ivrs.c index 7f1fe5d6aa..79b4ff6375 100644 --- a/src/soc/amd/common/block/acpi/ivrs.c +++ b/src/soc/amd/common/block/acpi/ivrs.c @@ -245,10 +245,15 @@ static unsigned long acpi_fill_ivrs40(unsigned long current, acpi_ivrs_ivhd_t *i if (nb_dev->bus->secondary == 0) { /* Describe EMMC */ - current = ivhd_describe_f0_device(current, PCI_DEVFN(0x13, 1), - IVHD_DTE_LINT_1_PASS | IVHD_DTE_LINT_0_PASS | - IVHD_DTE_SYS_MGT_TRANS | IVHD_DTE_NMI_PASS | - IVHD_DTE_EXT_INT_PASS | IVHD_DTE_INIT_PASS); + if (CONFIG(SOC_AMD_COMMON_BLOCK_EMMC)) { + /* PCI_DEVFN(0x13, 1) doesn't exist in the hardware, but it's what the + * reference code uses. Maybe to have a unique PCI device to put into + * the field that doesn't collide with any existing device? */ + current = ivhd_describe_f0_device(current, PCI_DEVFN(0x13, 1), + IVHD_DTE_LINT_1_PASS | IVHD_DTE_LINT_0_PASS | + IVHD_DTE_SYS_MGT_TRANS | IVHD_DTE_NMI_PASS | + IVHD_DTE_EXT_INT_PASS | IVHD_DTE_INIT_PASS); + } } ivhd_40->length += (current - current_backup); |