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authorFelix Held <felix-coreboot@felixheld.de>2021-08-04 22:22:46 +0200
committerMartin Roth <martinroth@google.com>2021-08-05 22:58:33 +0000
commit90ac882a32075b44435aa19ea664b89b79cac76e (patch)
tree7af14b70043f13cd54a6c5a9fc8961e3cbc90bda /src/soc/amd/common/block/spi/Kconfig
parentc2cf3946c95cca7a84b87725b453fdf2b8932ffd (diff)
soc/amd/common/block/spi: introduce SOC_AMD_COMMON_BLOCK_SPI_4DW_BURST
Add a new Kconfig option to enable or disable the 4 DWORD burst support of the SPI controller and use this setting to determine if the corresponding feature bit in SPI100_HOST_PREF_CONFIG will be set or cleared. Since fch_spi_disable_4dw_burst can now enable or disable the feature, rename it to fch_spi_configure_4dw_burst. On Stoneyridge the SPI_RD4DW_EN_HOST bit needs to be cleared (see the Rd4dw_en_host bit definition in the SPIx2C SPI100 Host Prefetch Config register in the public BKDG #55072 Rev 3.09), so add a SoC dependency to the Kconfig option. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id754fa8d5f9554ed25cf9f3341bfdd1968693788 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56814 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/soc/amd/common/block/spi/Kconfig')
-rw-r--r--src/soc/amd/common/block/spi/Kconfig6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/spi/Kconfig b/src/soc/amd/common/block/spi/Kconfig
index fa24f8308c..eb5412fd29 100644
--- a/src/soc/amd/common/block/spi/Kconfig
+++ b/src/soc/amd/common/block/spi/Kconfig
@@ -8,6 +8,12 @@ config SOC_AMD_COMMON_BLOCK_SPI
config SOC_AMD_COMMON_BLOCK_SPI_DEBUG
bool
+config SOC_AMD_COMMON_BLOCK_SPI_4DW_BURST
+ bool
+ depends on !SOC_AMD_STONEYRIDGE
+ help
+ Select this option to keep the 4 DWORD burst support enabled.
+
config EFS_SPI_READ_MODE
int
range 0 7