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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-07-02 20:46:25 +0300
committerFelix Held <felix-coreboot@felixheld.de>2021-04-15 23:41:06 +0000
commit31d49ec117bb7bb6179b5639844ac146fc0335a6 (patch)
tree70c05b6150e3fd98b5fc5158d4708d7dc02cbb59 /src/soc/amd/common/block/smi
parent70c70131023336aa718c928174b7c6e981679fcb (diff)
soc/amd/common/block/gpio_banks: Use configure_scimap()
There is no need to stash the SCI trigger register configuration and apply it at the end. Remove this to make SCI and SMI programming more symmetrical and to use available configure_scimap function instead of implementing it again, but without the additional checks. Using this function also allows removing soc_route_sci. Change-Id: Ie23da79546858282910db65182a6315ade506279 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43012 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/common/block/smi')
-rw-r--r--src/soc/amd/common/block/smi/smi_util.c5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/soc/amd/common/block/smi/smi_util.c b/src/soc/amd/common/block/smi/smi_util.c
index b763c3ba1a..ac2f4b450c 100644
--- a/src/soc/amd/common/block/smi/smi_util.c
+++ b/src/soc/amd/common/block/smi/smi_util.c
@@ -72,11 +72,6 @@ void southbridge_smi_set_eos(void)
smi_write32(SMI_REG_SMITRIG0, reg);
}
-void soc_route_sci(uint8_t event)
-{
- smi_write8(SMI_SCI_MAP(event), event);
-}
-
/**
* Configure generation of SCIs.
*/