diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-08-28 14:31:16 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-08-31 13:31:49 +0000 |
| commit | 7cdc4296f0fb88ae631ceecb80496447e7b2e53f (patch) | |
| tree | 0eb036a99bf6440d83a4d116a2e27a44b766612a /src/soc/amd/common/block/include/amdblocks | |
| parent | a637fa931056d734eb67ddbd9a1d8d2f9407302b (diff) | |
soc/amd/common/data_fabric: add support for extended MMIO addresses
The Genoa SoC supports MMIO addresses larger than 48 bits. Since the
MMIO base and limit registers in the data fabric only contain bits 16 to
47 of the MMIO address, the MMIO address extension register is
introduced on some SoCs like Genoa. This additional register contains
the upper bits of the MMIO base and limit. Since it's not available on
all SoCs, introduce the SOC_AMD_COMMON_BLOCK_DATA_FABRIC_EXTENDED_MMIO
Kconfig option to select the correct data_fabric_get_mmio_base_size
implementation to be added to the build.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic304f5797bc5661c1d511c95e457c6dde169d329
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77514
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Diffstat (limited to 'src/soc/amd/common/block/include/amdblocks')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/data_fabric.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/data_fabric.h b/src/soc/amd/common/block/include/amdblocks/data_fabric.h index 341bad6415..6fdd3f9a27 100644 --- a/src/soc/amd/common/block/include/amdblocks/data_fabric.h +++ b/src/soc/amd/common/block/include/amdblocks/data_fabric.h @@ -22,6 +22,9 @@ #define DF_MMIO_BASE(reg) (DF_MMIO_BASE0 + DF_MMIO_REG_OFFSET(reg)) #define DF_MMIO_LIMIT(reg) (DF_MMIO_LIMIT0 + DF_MMIO_REG_OFFSET(reg)) #define DF_MMIO_CONTROL(reg) (DF_MMIO_CTRL0 + DF_MMIO_REG_OFFSET(reg)) +#if CONFIG(SOC_AMD_COMMON_BLOCK_DATA_FABRIC_EXTENDED_MMIO) +#define DF_MMIO_ADDR_EXT(reg) (DF_MMIO_ADDR_EXT0 + DF_MMIO_REG_OFFSET(reg)) +#endif /* Last 12GB of the usable address space are reserved */ #define DF_RESERVED_TOP_12GB_MMIO_SIZE (12ULL * GiB) @@ -51,6 +54,9 @@ void data_fabric_set_mmio_np(void); enum cb_err data_fabric_get_pci_bus_numbers(struct device *domain, uint8_t *first_bus, uint8_t *last_bus); +void data_fabric_get_mmio_base_size(unsigned int reg, resource_t *mmio_base, + resource_t *mmio_limit); + /* Inform the resource allocator about the usable IO and MMIO regions and PCI bus numbers */ void amd_pci_domain_read_resources(struct device *domain); void amd_pci_domain_scan_bus(struct device *domain); |