diff options
author | Elyes Haouas <ehaouas@noos.fr> | 2022-07-16 09:48:27 +0200 |
---|---|---|
committer | Martin L Roth <gaumless@tutanota.com> | 2022-07-17 21:59:05 +0000 |
commit | 68fc51faf2cc83742b527b68a9009b81428b9ff2 (patch) | |
tree | 5cac120c129c4c382301ee503f08e59f222ee471 /src/soc/amd/common/block/cpu/noncar | |
parent | f9b535eecfda5065182aae9ec031956826cd1804 (diff) |
soc/amd/common: Fix some white spaces issues
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I54438978db13ba00188e53239f7034d1b258e912
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/amd/common/block/cpu/noncar')
-rw-r--r-- | src/soc/amd/common/block/cpu/noncar/early_cache.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/cpu/noncar/early_cache.c b/src/soc/amd/common/block/cpu/noncar/early_cache.c index 94c8b10272..d8684eea4d 100644 --- a/src/soc/amd/common/block/cpu/noncar/early_cache.c +++ b/src/soc/amd/common/block/cpu/noncar/early_cache.c @@ -60,7 +60,7 @@ void early_cache_setup(void) wrmsr(SYSCFG_MSR, sys_cfg); - var_mtrr_set(&mtrr_ctx.ctx, 0, ALIGN_DOWN(top_mem.lo, 8*MiB), MTRR_TYPE_WRBACK); + var_mtrr_set(&mtrr_ctx.ctx, 0, ALIGN_DOWN(top_mem.lo, 8 * MiB), MTRR_TYPE_WRBACK); /* TODO: check if we should always mark 16 MByte below 4 GByte as WRPROT */ var_mtrr_set(&mtrr_ctx.ctx, FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT); |