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authorRex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>2021-12-03 14:25:46 +0800
committerHung-Te Lin <hungte@chromium.org>2021-12-09 11:55:03 +0000
commit76c426ab285bc1a3c65305704575a1a165c396b5 (patch)
treedf83ae609f3227afdfde63d9c6ba9d5ffd12bc0d /src/soc/amd/common/Kconfig.common
parent9f6805afe8d014f4a8fe2d3a342221b2c62f15df (diff)
mb/google/corsola: correct NOR flash configuration in GPIO set
The reference design has changed to use GPIO SET1 for NOR flash. There are no devices already built using SET0 so we can safely change the implementation without conditional configs. Reference document: kingler_mt8186_mt6366_lpddr4x_e.pdf, page 11. crab_proto 0_2021112.pdf, page 11. BUG=b:202871018 TEST=flash verify pass on kingler on bootblock stage Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I031686ccddcf789f3fa966d113ee48949e454b8f Reviewed-on: https://review.coreboot.org/c/coreboot/+/59945 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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