diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2024-01-26 15:05:40 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-27 16:40:07 +0000 |
commit | 26577d2ecbb8c01635b959d296f70eb251743046 (patch) | |
tree | e0a7cc317a68102ebb408a87f5459898f4b6e309 /src/soc/amd/cezanne | |
parent | 39feb7f0f940d2fc096f122529646ace17141eb3 (diff) |
soc/amd: factor out acpi_add_fsp_tables
Factor out acpi_add_fsp_tables from the soc_acpi_write_tables function
and move the remaining parts of the soc_acpi_write_tables function to
the SoC's acpi.c. This aligns the other family 17h/19h SoCs more with
Genoa and only leaves the FSP-specific code in agesa_acpi.c which will
be made common in a following patch. I decided against also renaming
agesa_acpi.c to acpi_fsp.c, since that would have made the diff less
readable and the files get deleted in a following patch anyway.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ia87ac0e77c5e673e694703b85a4bab85a34b980e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80224
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/cezanne')
-rw-r--r-- | src/soc/amd/cezanne/acpi.c | 14 | ||||
-rw-r--r-- | src/soc/amd/cezanne/agesa_acpi.c | 9 |
2 files changed, 15 insertions, 8 deletions
diff --git a/src/soc/amd/cezanne/acpi.c b/src/soc/amd/cezanne/acpi.c index 7a5fdf0ed5..417d5f9aa4 100644 --- a/src/soc/amd/cezanne/acpi.c +++ b/src/soc/amd/cezanne/acpi.c @@ -13,6 +13,7 @@ #include <arch/smp/mpspec.h> #include <console/console.h> #include <cpu/amd/cpuid.h> +#include <device/device.h> #include <soc/iomap.h> #include <types.h> #include "chip.h" @@ -54,6 +55,19 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->flags |= cfg->common_config.fadt_flags; /* additional board-specific flags */ } +unsigned long soc_acpi_write_tables(const struct device *device, unsigned long current, + acpi_rsdp_t *rsdp) +{ + /* TODO: look into adding CRAT */ + + /* IVRS */ + current = acpi_add_ivrs_table(current, rsdp); + + current = acpi_add_fsp_tables(current, rsdp); + + return current; +} + const acpi_cstate_t cstate_cfg_table[] = { [0] = { .ctype = 1, diff --git a/src/soc/amd/cezanne/agesa_acpi.c b/src/soc/amd/cezanne/agesa_acpi.c index 96ff0f00fe..a5057bf59f 100644 --- a/src/soc/amd/cezanne/agesa_acpi.c +++ b/src/soc/amd/cezanne/agesa_acpi.c @@ -2,21 +2,14 @@ #include <acpi/acpi.h> #include <amdblocks/acpi.h> -#include <device/device.h> #include <FspGuids.h> #include <types.h> -unsigned long soc_acpi_write_tables(const struct device *device, unsigned long current, - acpi_rsdp_t *rsdp) +unsigned long acpi_add_fsp_tables(unsigned long current, acpi_rsdp_t *rsdp) { - /* TODO: look into adding CRAT */ - /* add ALIB SSDT from HOB */ current = acpi_align_current(current); current = add_agesa_fsp_acpi_table(AMD_FSP_ACPI_ALIB_HOB_GUID, "ALIB", rsdp, current); - /* IVRS */ - current = acpi_add_ivrs_table(current, rsdp); - return current; } |