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authorLijian Zhao <lijian.zhao@intel.com>2017-12-15 19:10:18 -0800
committerMartin Roth <martinroth@google.com>2017-12-22 16:54:36 +0000
commitc50296d997ee9d8643f8bf5d1fce1842194c9cc9 (patch)
tree0786bbfc333f9f9398917464d0e098a798163be9 /src/security/vboot/Makefile.inc
parentceac787a4f5d20ca6b0358bf4dd35f47509b2427 (diff)
soc/intel: Treat time-out as failure in HECI
If HECI gets times out when waiting for read slots, there's no need to read back reply message to decide if the HECI recieve successed or not. Otherwise, system will stuck after global reset required. BUG=b:707290799 TEST=Boot up meowth board without battery, and confirm hard reset got trigged after heci time out. Change-Id: I7c1655284d7027294d8ff5d6a5dbbebe4cbd0c47 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/22910 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/security/vboot/Makefile.inc')
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