diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-11-10 20:39:41 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-25 09:11:46 +0000 |
| commit | c19cbeeb6b4ec1f083951156e6b67d02390369b5 (patch) | |
| tree | 7d0dec579ec5911fe105befab02642e6ef408ae4 /src/northbridge | |
| parent | ec8f5c79a5fd16531006dd950dc3fad71c97ca8b (diff) | |
device: Drop unused HyperTransport code
Only two definitions are actually used somewhere, the rest is unused.
Change-Id: Iec52d0d47fce6a1ec5455b670824b995a7a34a4c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47407
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/agesa/family14/northbridge.c | 1 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family15tn/northbridge.c | 1 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family16kb/northbridge.c | 1 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/nb_common.h | 3 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/00630F01/northbridge.c | 1 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/00730F01/northbridge.c | 1 | ||||
| -rw-r--r-- | src/northbridge/amd/pi/nb_common.h | 3 |
7 files changed, 6 insertions, 5 deletions
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index c1e342cde9..7c37ff8d71 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -8,7 +8,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <device/hypertransport.h> #include <string.h> #include <lib.h> #include <cpu/cpu.h> diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index 207bec2d37..2d5234dde9 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -8,7 +8,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <device/hypertransport.h> #include <string.h> #include <lib.h> #include <cpu/cpu.h> diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index cedc7dae06..addd40f3c6 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -8,7 +8,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <device/hypertransport.h> #include <string.h> #include <lib.h> #include <cpu/cpu.h> diff --git a/src/northbridge/amd/agesa/nb_common.h b/src/northbridge/amd/agesa/nb_common.h index 31cee3ce79..66fbf92694 100644 --- a/src/northbridge/amd/agesa/nb_common.h +++ b/src/northbridge/amd/agesa/nb_common.h @@ -3,6 +3,9 @@ #ifndef __AMD_NB_COMMON_H__ #define __AMD_NB_COMMON_H__ +#define HT_IO_HOST_ALIGN 4096 +#define HT_MEM_HOST_ALIGN (1024 * 1024) + #define DEV_CDB 0x18 #endif diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c index 90d5603ca4..110dc84001 100644 --- a/src/northbridge/amd/pi/00630F01/northbridge.c +++ b/src/northbridge/amd/pi/00630F01/northbridge.c @@ -7,7 +7,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <device/hypertransport.h> #include <string.h> #include <lib.h> #include <cpu/cpu.h> diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 75e1f02c16..41554b84eb 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -10,7 +10,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <device/hypertransport.h> #include <string.h> #include <stdlib.h> #include <lib.h> diff --git a/src/northbridge/amd/pi/nb_common.h b/src/northbridge/amd/pi/nb_common.h index a6daba3f9d..bee75c7109 100644 --- a/src/northbridge/amd/pi/nb_common.h +++ b/src/northbridge/amd/pi/nb_common.h @@ -3,6 +3,9 @@ #ifndef __AMD_NB_COMMON_H__ #define __AMD_NB_COMMON_H__ +#define HT_IO_HOST_ALIGN 4096 +#define HT_MEM_HOST_ALIGN (1024 * 1024) + #define DEV_CDB 0x18 #define IO_APIC2_ADDR 0xfec20000 |